Technical Field
This disclosure relates to resonant converters and more particularly to a method of feedback commanding a monophase resonant converter, to a related monophase resonant converter and to a polyphase resonant converter.
Description of the Related Art
Power distribution in server and data-center fields is continuously expanding. For continuous improvement of these electronic devices it is desirable to maximize the efficiency of voltage converters that supply them in order to minimize the supplied power for providing the same used power, in order to limit thermal dissipation in environments in which they are installed and thus the power absorbed by the relative cooling appliances.
There are various voltage distribution systems, powered by the mains voltage, to generate the VCPU supply voltage for processors. Presently, the mains voltage is converted into a first voltage distributed through a main supply bus, then converted into a second lower voltage (typically 12V) distributed on an intermediate bus and finally converted into the supply voltage VCPU of processors. In order to optimize the efficiency of systems upstream the processor, the main supply bus is at a voltage of 48V.
It is thus to be chosen to regulate the voltage of the processor either using the main supply bus at 48V throughout the intermediate bus at 12V, in order to shorten transient response, or directly from the bus at 48V, in order to enhance conversion efficiency.
A solution for carrying out the second conversion in a two-stage system (48V−12V−VCPU) is to use polyphase switching regulators, that allow to have an optimal response to load transients, the possibility of sinking current from the load (sink mode) and to keep good efficiency of the stage itself. In polyphase buck converters, thanks to different control techniques, it is possible to meet response specifications to load transients and to changes of reference voltage. Nevertheless, these converters work at low duty-cycles and provide a double voltage conversion from 48V, the voltage of the supply bus, down to the final voltage VCPU, generating an intermediate voltage at 12V.
It is known to use voltage resonant converters for generating regulated voltages of a level adapted to power processors. The article by L. Huber et al. “1.8 MHz 48V Resonant VRM: Analysis, Design and Performance Evaluation”, IEEE Trans. on Power Electronics, Vol. 21, No. 1, January 2006, discloses a voltage resonant converter of the type shown in FIG. 1. It has a primary half-bridge switching stage for forcing an AC current through a primary winding, composed of N loops magnetically coupled with a secondary winding electrically connected in parallel with a capacitance for forming a resonant circuit. The first and second secondary inductors LF1, LF2 cooperate in order to provide the load LOAD with the requested current IO. The voltages on the secondary inductors LF1 and LF2 are outphased between them and their mutual outphasing is regulated through the switches Q1 and Q2, commanded by the command circuit of FIG. 2, such to regulate the voltage VO at the load. The command circuit implements a fixed frequency control technique in which the desired outphasing between the secondary inductors LF1 and LF2 is attained by outphasing the on/off signals SR of the switches at the secondary side in respect to the on/off signals of the switches of the half-bridge at the primary side. This outphasing is determined by the voltage of the error amplifier EA and thus by the difference between the output voltage VO and a reference voltage.
An advantage of this solution is the possibility of connecting modules in parallel because it works at a fixed frequency and thus the modules may be easily operated to be interleaved among them.
Nevertheless, it presents numerous drawbacks, among which:
1) Latency of the response to load variations due to the fixed working frequency;
2) Voltage dynamics at the secondary inductors that depend upon the compensation operated by the error amplifier EA;
3) Optimization of the system efficiency only at a certain duty cycle;
4) Difficulty of compensation because of the complex control law;
5) It does not allow to work in sink mode.
The first drawback is minimized thanks to the use of a high switching frequency (typically 1.8 MHz equivalent) but this choice implies an increment of switching losses (typically, of MOSFETs) at the primary side (HB) and at the secondary side (SR).
The second drawback is very dangerous because it may compromise reliability of the converter. Indeed, the duration of the charge phase of the secondary inductors is determined by the error amplifier EA thus, with a too aggressive compensation or even an instable compensation, the leakage inductance at the primary side may be excessive and may raise voltages at the secondary inductors to values that may make the secondary switches (typically, MOSFETs) work outside the respective safe operating area.
Also the third drawback is due to the fixed working frequency. The duration of each half-wave at the secondary side at the secondary inductors is essentially determined by the resonance frequency of the converter, that is a fixed amount, and in the hypothesis that this half-wave is rectangular for sake of ease. Therefore the converter, in order to regulate the voltage with a certain duty-cycle, must necessarily increase the peak of the half-wave at the secondary side by pre-charging the leakage inductance. This behavior, imposed by the command loop, makes the rms value of the current flowing throughout the MOSFETs greater than the minimum value requested for delivering the output current at any duty cycle. An optimization will occur only at the output voltage such that the peak of half-waves at the secondary side is comparable with the input voltage scaled by a factor N of the transformer (plus an eventual difference due to resonance).
This output voltage is about VOUT=Tres/Tsw*VIN wherein VIN is the input voltage, Tres is the duration of each half-wave at the secondary side, equal to the resonance period, and Tsw the reciprocal of the switching frequency of each switch at the secondary side.